SEMICONDUCTORS
Researchers in IIT Bombay have achieved a breakthrough in making glass substrates that has significant advantages over the conventional silicon substrates in applications such as 5G devices.
Glass substrates (technically, fused silica, which is pure form of glass without any metallic impurities) are much cheaper – one estimate has it that it is 80 per cent cheaper than Silicon substrates. But nothing in the world comes without a flipside. Glass is brittle and for technical reasons, not so easy to fabricate.
Prof. Pradeep Dixit and his research team at IIT Bombay have received research funding by the ‘Imprint’ program by the MHRD and DSIR (Department of Scientific and Industrial Research) to develop a low-cost technique for machining fused silica and other non-conductive hard materials using Electrochemical discharge machining method. In this technique, a very high temperature (>3000 C) is locally produced by electrical discharge. Such a high temperature is enough to vaporize most of the materials used in the semiconductor applications. Although the fundamental of the ECDM process is well known, the fabrication of multiple through-holes in fused silica at wafer-scale is first time demonstrated at IIT Bombay. Using the wire-EDM method, first, a customized tool electrode having multiple tool tip was created by the wire-EDM process. Then, the through-holes were created in a 0.5 mm thick fused silica wafer, which took less than 10 min. Later, these through-holes were filled with copper to create 3-dimensional metal interconnects, commonly termed as Through-glass vias (TGV). Using the TGVs, multiple electronic devices can be stacked in the vertical axis, therefore, reducing the footprint area and increasing the signal transmission speed. At IIT Bombay, Prof. Dixit team has demonstrated the coil-type structures etched in front side of fused silica wafer and connected to the back-side by TGVs, thus, forming a low-cost 3D Inductors, commonly used as passive energy storage devices in consumer electronics applications.
This indigenous developed low-cost micromachining technique can be used to create planer structures like straight/spiral microchannels needed in micro-fluidic/Bio-MEMS applications. There are no low-cost micromachining for non-conductive materials available in India and this method may emerge as the potential micromachining applicable in Semiconductor domain. The researchers are in discussion with Semiconductor lab (SCL), Chandigarh and other institute to bring this technology on a manufacturing level.
